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JPS6038799A Expired / Lapsed JP ⏱️ 0.0 years remaining

Reading circuit for semiconductor non-volatile memory

Assignee: Seiko Instruments Inc
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Filing: 1983-08-11
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Granted: —
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Expires: 2003-08-11
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Abstract

Abstract PURPOSE:To take out a large output voltage variation though a variation of threshold of a non-volatile memory is small, by driving an MOS transistor TR with the sourc side of the non-volatile memory. CONSTITUTION:A P type MOSTR11 is driven by a non-volatile memory 12 whose drain is set to an earth potential; and if a floating gate electrode of the memory 12 is not electrostatically charged with electrons, a prescribed source current is flowed through a power source voltage VDD, and a corresponding read voltage Vout is outputted. Meanwhile, if the floating gate electrode is electrostatically charged, the source current is hardly flowed, and the corresponding voltage Vout is generated. Consequently, a read output where the voltage is varied greatly in accordance with electrostatic charge or non-electrostatic charge of the floating electrode corresponding to stored contents is taken out though a variation of threshold of the non-volatile memory is small, and thus, a stable read of less variation of the output voltage is performed.

Inventors

  • 👤 Yutaka Hayashi
  • 👤 豊 林
  • 👤 Masaaki Kamiya
  • 👤 昌明 神谷
  • 👤 Yoshikazu Kojima
  • 👤 芳和 小島
  • 👤 Kojiro Tanaka
  • 👤 小次郎 田中

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 08:57
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0425; G11C16/06; G11C16/26; G11C17/00

Claims Analysis

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References Cited (Backward Citations)

JPS4844581A Cited
JPS58112370A Cited

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