Field effect transistor

Abstract

Abstract PURPOSE:To enable to have a high mutual conductance and to act at high speed by forming an active layer, source electrode and drain electrode of different III- Vgroup compound semiconductors. CONSTITUTION:An i-type InP buffer layer 11 is provided on a semi-insulation InP substrate 10, and an N type InGaAs active layer 12 and an N<+> type InP electrode layer 13 are grown thereon, respectively. As the contact for current injection to the drain-source, AuGeNi/Au films 14 and 16 are evaporated respectively and then treated by alloying. At the gate part, the layer 13 is etched through an aperture formed in a spacer Si3N4 17. This etching stops at the interface between the layers 12 and 13. Therefore, the channel thickness immediately under the gate electrode 15 is equal to the film thickness of the layer 12. In the Schottky barrier gate FET thus formed, the gate-source resistance is low only by the resistance of the layer 12 of a distance l. Besides, the mutual conductance is high, and high speed action is enabled.

Inventors

• 👤 Kazunari Oota
• 👤 一成 太田
• 👤 Masaru Kazumura
• 👤 数村　勝
• 👤 Tatsuo Otsuki
• 👤 達男 大槻

Bibliographic Details