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JPS6028255A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Oki Electric Industry Co Ltd
•
Filing: 1983-07-26
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Granted: —
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Expires: 2003-07-26
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Abstract

Abstract PURPOSE:To improve the density of mounting easily by respectively fitting chips, chip selective logics thereto differ to each other, to the surface and back of a molding ribbon so as to be mutually arranged in symmetrical manner regarding the position of a junction pad. CONSTITUTION:A ROM chip 100 is fixed to an island 500 in the surface A of a molding ribbon and wired 200, and a ROM chip 300 is set to an island 600 in the surface B and wired 400. Since both surfaces are arranged in symmetrical manner while using X-Y lines as axes, all pins are connected in common through a resin seal, thus obtaining a ROM, capacitance thereof is magnified in double. The areas of the island sections can be reduced, a connection is simplified, and a device having the high density of mounting is acquired.

Inventors

  • 👤 Tetsuzo Taniguchi
  • 👤 谷口 徹三
  • 👤 Seietsu Tanaka
  • 👤 田中 誠悦

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 12:56
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/01; H10W70/05

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5617050A Cited
JPS56137665A Cited
JPS5810839A Cited

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