P-i-n diode

Abstract

Abstract PURPOSE:To make an energy barrier on the interface of a junction between i type InGaAs and p type InP easy, and to improve the efficiency of an element by bringing impurity concentration in an i type InP layer to a fixed value or less and each forming transition regions having compositions of InP and InGaAs on both sides of the interface of the junction between a p type InP layer and an i type InGaAs layer in predetermined width. CONSTITUTION:An n type InP layer 2, an i type InGaAs layer 3 and a p type InP layer 4 are formed continuously onto an n<+> type InP substrate 1. An electrode 6 is formed onto the p type InP layer 4, and another electrode is shaped onto the back of the n<+> type InP substrate 1. Impurity concentration in the i type InGaAs layer 3 is brought to 1X10<15>cm<-3> or less by utilizing a vapor phase epitaxial growing method in the p-i-n diode. Transition region D having compositions of InGaAs and InP are formed on both sides of the interface between the InGaAs layer 3 and the InP layer 4. P and As mutually diffuse in the region D, and the width of the region D is brought to 20nm or more. The growing rate of the InP layer formed onto the InGaAs layer is slowed down and the transition region D are extended in the vapor phase epitaxial growth method at that time. Accordingly, an energy barrier on a hetero-junction surface is made easy, and high-frequency characteristics can be improved.

Inventors

• 👤 Masahiko Takigawa
• 👤 正彦 滝川

Bibliographic Details