Semiconductor integrated circuit device

Abstract

Abstract PURPOSE:To enable to improve the integration degree of an SRAM by a method wherein a high-resistance load element and an MISFET, which constitutes an FF, are buried in a fine hole provided in the semiconductor substrate in the SRAM having a memory cell constituted of the high-resistance load element and the MISFET. CONSTITUTION:An n<+> type buried layer 4, whereon the reference voltage VSS is impressed, is provided in the surface layer part of an n<+> type Si substrate 1, whereon the supply voltage VCC is impressed, and a p<-> type layer 3 for MISFET formation is made to epitaxially grow on the whole surface including the layer 3. A fine groove 6, which intrudes in the substrate 1 while being made to penetrate the buried layer 4, is bored and an n<+> type region 10, which is used for improving the contact of the groove 6 and the substrate 1, is provided under the base face of the groove 6. U-shaped insulating films 7 are formed on the sidewalls of the fine groove 6 and the film 7 on one side of the films 7 is made to extendedly provided on the layer 3 for using as a gate insulating film 12. Moreover, a conductive layer 8 is buried in each U- shape of the films 7 and a high-resistance load element 11 is buried in the hollow part between the films 7. After that, a gate electrode 15 is mounted on the film 12 being provided extendedly, a gate electrode 14 is provided stretching over both of the films 7, and an n<+> type source region 17 and an n<+> type drain region 17 are formed on the lower sides of the gate electrodes 14 and 15 through the films 7.

Inventors

• 👤 Mitsumasa Koyanagi
• 👤 光正 小柳
• 👤 Hiroko Kaneko
• 👤 兼子　宏子

Bibliographic Details