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JPS6022352A Expired / Lapsed JP ⏱️ 0.0 years remaining

Integrated circuit package

Assignee: Toshiba Corp
•
Filing: 1983-07-19
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Granted: —
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Expires: 2003-07-19
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Abstract

Abstract PURPOSE:To facilitate high density mounting by a method wherein pins are provided to a pedestal with terminals planted in enclosure manner, and substrates, which are mated with the pins and on recessed parts of which chips are mounted, and wiring boards are closely laminated alternately. CONSTITUTION:An LSI chip 11 is bonded to a bed 15. The beds 15 and wiring boards 13 are laminated alternately. Interconnection between the LSI and the wiring board 13 is performed and interconnection between the LSIs is performed through a pin 12. Connection is made by direct connection of soldering or by bonding of a lead wire. The thickness of ordinary LSI chip can easily be made at mm. order or less and the thickness of one set including internal lead wires can be made 1mm. or less.

Inventors

  • 👤 Masatoshi Sekine
  • 👤 優年 関根

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 06:30
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W72/00; H10W72/851; H10W90/00; H10W90/401; H10W90/20; H10W90/22; H10W90/297; H10W90/701; H10W90/751; H10W90/754

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Total Claims: 0
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