← Back to Patent Explorer
JPS60189261A Expired / Lapsed JP ⏱️ 0.0 years remaining

Gate turn-off thyristor

Assignee: Toshiba Corp
•
Filing: 1984-03-09
•
Granted: —
•
Expires: 2004-03-09
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To make a gate turn-off thyristor to have large anode current breaking faculty while having a low latching current and a low ON-state voltage by a method wherein out of a first emitter layer, comparatively low impurity concentration regions have nearly a rectangular shape to be arranged inside of regions formed by projecting a second emitter layer on the anode electrode side, and the short side thereof is made to have length of 0.5 times or more of length of the short side of the second emitter layer. CONSTITUTION:Diffused impurity concentration of the low impurity concentration region 29 of a P type emitter 21 is 4.5X10<16>cm<-3>, thickness of the region thereof is 30mum, diffused impurity concentration of the high impurity concentration region 28 of the emitter is 4.0X10<19>cm<-3>, and thickness of the region thereof is 25mum, for example. Impurity concentration of an N type base 22 is 3.0X10<13>cm<-3>, thickness of the region thereof is 600mum, diffused impurity concentration of a P type base 23 is 8.5X10<17>cm<-3>, thickness of the region thereof is 40mum, diffused impurity concentration of N type emitters 24 are 2.0X10<20>cm<-3>, and thicknesses of the regions thereof are 10mum. Width XK of the N type emitter is 350mum, and width XpE<-> of the low impurity concentration region of the P type emitter corresponding thereto is 180mum. At this time, relation XpE<->/XK= 0.51 is made to be satisfied. As a semiconductor substrate, an Si wafer of 18phi diameter is used.

Inventors

  • 👤 Takashi Yotsudo
  • 👤 孝 四戸

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 06:43
CPC Classifications
H; H10; H10D; H10D18/00; H10D18/60

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag