Generating circuit of sampling pulse

Abstract

Abstract PURPOSE:To obtain a pulse having an optimum sampling phase by shifting the phase of a sampling pulse in response to the output of a counter which counts up edge signals in accordance with the level of the sampling pulse. CONSTITUTION:An exclusive OR circuit 17 delivers an edge signal SE showing the rise of fall of a character signal SD of an input terminal 15. An up/down counter 18 performs a count-up operation in case the rise timing of the signal SE exists in a period L of a sampling pulse SP. A digital phase shift circuit 13 delays the phase of the pulse SP. The counter 18 performs a count-down operation in case said rise timing exists in an H period of the pulse SP. Thus the phase of the pulse SP is advanced. This action is repeated to obtain a sampling pulse having an optimum sampling phase.

Inventors

• 👤 Hiroo Kitazawa
• 👤 北澤　啓雄

Bibliographic Details