Flip-flop circuit

Abstract

Abstract PURPOSE:To decrease remarkably the effect of a spike noise by alpha rays from an IC package by setting a threshold voltage of a flip-flop circuit lower than a mediam of a logical amplitude. CONSTITUTION:Fig. shown the flip-flop circuit of series gate structure and a block L shown in broken lines indicates a threshold value setting circuit of the flip-flop circuit. An emiter output of a PNP transistor (TR) Q9 at a point P1 is fed to a base of a Q2 constituting an input side flip-flop gate as a threshold voltage and a collector output of a Q10 at a point P2 is fed to a base of a Q3 constituting a holding circuit flip-flop gate as other threshold voltage. Although the alpha rays emitted from the IC pakage give effect on the Q output holding a high level, since a base potential of the Q3 is set lower, the margin of the high level side surpasses the spike noise level due to the alpha rays thereby decreasing the effect of the alpha rays.

Inventors

• 👤 Yuichi Suzuki
• 👤 裕一 鈴木
• 👤 Takehiro Akiyama
• 👤 秋山　岳洋
• 👤 Akio Morita
• 👤 晃生 森田

Bibliographic Details