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JPS60163458A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mos type semiconductor device

Assignee: National Institute of Advanced Industrial Science and Technology
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Filing: 1984-02-06
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Granted: —
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Expires: 2004-02-06
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Abstract

Abstract PURPOSE:To enable the increase in density of elements by a method wherein element isolation is accomplished by means of an element isolation gate connected to a ground line in an N-channel type MOS transistor, and by means of an element isolation gate connected to a positive power source line in a P-channel type MOS transistor. CONSTITUTION:An element isolation gate electrode 29 is formed on the Si island region 22 between MOS transistors 241 and 242 via gate oxide film 28, and a reference power source is connected to the gate electrode 29. A gate oxide film 26 is extended on P<+> type impurity regions 231 and 232 of high concentration, and field oxide films 301 and 302 are formed at ends. Since the isolation among elements is carried out by means of the gate electrode 29, the increase in density can be realized. The gate end is provided with a region of the same film thickness as that of the gate oxide film, so that a parasitic MOS transistor can not be formed on the side wall of the Si island region 22; therefore, the decrease in characteristics or the malfunction due to the irradiation with radiation ascribed to the transistor can be prevented.

Inventors

  • 👤 Hideji Koike
  • 👤 秀治 小池

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 06:22
CPC Classifications
H; H10; H10D; H10D86/00

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