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JPS60141019A Expired / Lapsed JP ⏱️ 0.0 years remaining

Logic circuit

Assignee: NEC Corp
•
Filing: 1983-12-28
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Granted: —
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Expires: 2003-12-28
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Abstract

Abstract PURPOSE:To save waste power consumption by inserting an FET connected to a gate control signal application terminal in series with a drive current specifying circuit so as to interrupt selectively a drive current of a logic circuit not requiring from a circuit to be driven. CONSTITUTION:The FET4 whose gate is connected to the control signal application terminal 17 is inserted in series with an emitter of the drive current specifying Tr3 and its source is connected to a voltage source terminal 12. In this logic circuit, in taking the conductive resistor of the FET4 as Rc1 and the resistance value R'3 as R3'=R3-Rc1, and the R3 as the resistance of as conventional currentspecifying circuit, then the drive current of the circuit is equal to that of the conventional circuit when the FET4 is conductive. On the other hand, when the FET4 is interrupted, the power consumption is zero. Thus, the power consumption is saved by interrupting selectively an unnecessary logic circuit.

Inventors

  • 👤 Yoji Hirano
  • 👤 要二 平野

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 22:07
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448; H03K19/0008; H03K19/0016; H03K19/082; H03K19/086

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