Memory device

Abstract

Abstract PURPOSE:To improve the operating speed of a system using a memory by comparing an input/output of a write/read data amplifier of a memory cell so as to generate a write/read end signal to the memory cell thereby eliminating unnecessary wait period. CONSTITUTION:A write input data via a data control circuit 14 is latched to a control circuit 17, amplified by a sense amplifier 13, written in the memory cell 11 and H or L is identified clearly by a comparator 15 to which a reference level is set. Then the output of the comparator 15 and the circuit 17 is compared by a comparator 16 and when they are coincident, a write end signal is outputted and a CPU is started immediately to this signal. A read end signal is outputted similarly. Thus, it is not necessary to provide an unnecessary prescribed period of wait period to the CPU, and the operating speed of the system using the memory cell is improved.

Inventors

• 👤 Eisuke Ito
• 👤 栄介 伊藤

Bibliographic Details