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JPS60103631A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: NEC Corp
•
Filing: 1983-11-11
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Granted: —
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Expires: 2003-11-11
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Abstract

Abstract PURPOSE:To enable the normal operation of a circuit regardless of increase of peripheral circuits by providing one bonding pad in a circumferential part of a chip and at least one bonding pad an inside part of the chip and connecting each bonding pad to the same external lead-out lead by a metal wire respectively. CONSTITUTION:Bonding pad 4 is arranged in the circumferential part of a semiconductor chip 10 and is connected to an external lead-out lead 5 by a metal wire 6. For one signal wire, one bonding pad 4' in the circumferential part of the chip and at least one bonding pad 4'' the inside part of the chip are arranged with interposing other signal wires 1, 2 and 3. And the bonding pads 4' and 4'' are connected to the same external lead-out lead 5' by metal wires 6' and 6'' respectively. At least one set of such bonding pads is provided. Consequently, it becomes unnecessary to provide the wiring of polysilicon between the bonding pad 4'' and the bonding pad 4' in the circumferential part thereby reducing the wiring resistance.

Inventors

  • 👤 Yoshinori Sato
  • 👤 義則 佐藤

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 01:56
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10W70/00; H10W70/60; H10W72/071; H10W72/075; H10W72/50; H10W72/541; H10W72/5449; H10W72/931; H10W72/932; H10W90/00; H10W90/701; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS4950878A Cited
JPS52157768U Cited
JPS5687350A Cited

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