Microcomputer
Abstract
Abstract PURPOSE:To reduce the frequency with a low-speed processing program in order to realize small power consumption by switching the clock frequency with a prescribed instruction. CONSTITUTION:A computer logic circuit 5 writes 1 on a D-FF6 in a high-speed processing mode. As a result, the output of the 1st (standard) oscillating circuit 1 is prevented by an AND gate 18. Then the 2nd oscillating circuit 2 which has oscillations with a frequency higher than the circuit 1 starts its actuation. This oscillation output is supplied to a clock generator 4 through an OR gate 19. Therefore, a high clock is supplied to a computer logic circuit 6 to perform the high-speed processing. While 0 is written on the D-FF6 in a low-speed processing mode. Thus the actuation of the circuit 2 is discontinued, and the output of the circuit 1 is supplied to the generator 4.
Inventors
- 👤 Yasuhiko Okuyama
- 👤 奥山 泰彦
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.