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JPS59969A Expired / Lapsed JP ⏱️ 0.0 years remaining

Field effect transistor

Assignee: NTT Inc
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Filing: 1982-06-25
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Granted: —
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Expires: 2002-06-25
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Abstract

Abstract PURPOSE:To enable to perform a high speed operation by forming a V-shaped groove on a semiconductor layer and shortening the gate length. CONSTITUTION:A semiconductor layer 21 made of GaAs having small electron affinity, a semiconductor layer 22 having high specific resistance and large electron affinity as well as made of GaAs, and a semiconductor layer 23 having low specific resistance and small electron affinity as well as made of GaAs are laminated. A semiconductor layer 26 having high specific resistance and small electron affinity as well as made of AlGaAs is formed on a groove 25 which is formed on a laminate 24. A semiconductor layer 27 having low specific resistance and small electron affinity as well as made of AlGaAs is formed on the layer 26. A gate electrode 28 which is extended oppositely to the side surface which faces the groove 25 is attached onto the layer 27 to form a Schottky junction 29.

Inventors

  • 👤 Kotaro Tsubaki
  • 👤 光太郎 椿
  • 👤 Kunishige Oe
  • 👤 尾江 邦重
  • 👤 Kenji Kumabe
  • 👤 隈部 建治

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 20:54
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/475; H10D30/4755; H10D30/80; H10D30/87; H10D30/871

Claims Analysis

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References Cited (Backward Citations)

JPS5466780A Cited
JPS577165A Cited

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