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JPS5986253A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit

Assignee: Fujitsu Ltd
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Filing: 1982-11-02
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Granted: —
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Expires: 2002-11-02
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Abstract

Abstract PURPOSE:To enable to apply the lowest voltage to a semiconductor substrate of an integrated circuit in which an analog circuit and a digital circuit are mixed by pure aluminum wirings without fail by contacting wirings for applying the lowest voltage by providing a dummy land at one side. CONSTITUTION:An n type dummy land 7 is formed by diffusing or ion implanting n type impurity on a p type semiconductor substrate 2. Wirings 4A are ohmically contacted with the substrate through a subcontacting window 6A of large area with the land 7 and aluminum wirings 4A, and connected to the emitter region E of an n-p-n type transistor 5A. In this manner, a diode D is formed between the substrate 2 and the land 7, and even if a resistor R is connected between the contacting regions 6D and 6A, the connection is interrupted by a diode D of floating state, and the variation in the voltage of the wirings 4A is not transmitted to the wirings 4D.

Inventors

  • 👤 Tamotsu Ishikawa
  • 👤 保 石川
  • 👤 Hirokazu Tanaka
  • 👤 田中 裕計

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 13:46
CPC Classifications
H; H10; H10W; H10W72/00

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