Manufacture of semiconductor device

Abstract

Abstract PURPOSE:To obtain a high speed bi-polar transistor by forming an emitter layer, a base layer, and an isolation oxide film by self-alignment. CONSTITUTION:An N<-> epitaxial layer 12 are superposed on an N<+> buried layer 11 of a P type Si substrate 10 and then surrounded by an SiO2 13. A P<-> type single crystal 14, a P<-> type poly Si 16, an N<+> single crystal 15, and an N<+> poly Si 17 are laminated by molecular beam epitaxial method, and an Si3N4 mask 18 is applied. The N<+> layer 17 is selectively removed with a solution whose rate of etching of the N<+> layer to the P<-> layer is 5 or more, and thus the side wall of the N<+> emitter layer 15 is exposed. Next, the P<-> layer 16 is changed into a P<+> layer 16' by ion implantation, and is then covered with a thermal oxide film 19'. At this time, a P<+> layer 20 is generated in the base 14. An SiO2 on the film 16' is removed by anisotropic etching, thus making the film 19 remain selectively, Mo, etc. are vapor-deposited and annealed, resulting in providing an MoSi 21. Then, it is covered with an SiO2 film 22, and electrode 23 and 24 are laid by providing apertures. This constitution makes the distance between the base and the emitter shortened, then enables to reduce the external base resistance, therefore to obtain the excellent high speed bi-polar element.

Inventors

• 👤 Kenji Kawakita
• 👤 川北　憲司
• 👤 Hiroyuki Sakai
• 👤 坂井　弘之
• 👤 Tsutomu Fujita
• 👤 勉 藤田
• 👤 Toyoki Takemoto
• 👤 竹本　豊樹

Bibliographic Details