Semiconductor integrated circuit device

Abstract

Abstract PURPOSE:To attain the most suitable arrangement of both FETs when the directions of the gates of the III-V group compound semiconductor FETs are to be arranged in two directions making one direction square with another direction by a method wherein the directions of the gates are made in parallel with the [001], [010] directions of the crystal of a substrate. CONSTITUTION:An N<+> type layer 2 is provided in the (100) face of a semi-insulating GaAs substrate 1, and a gate electrode 3 of W5Si3 is formed. After then, N<+> type layers 4 are provided using the electrode 3 as a mask, electrodes 5 of AuGe/Au are fixed, and the samples A-D are manufactured. At this time, the width directions of the respective gates are made in parallel with the directions [001], [010], [011], [01-1] respectively. At this time, the variations of the gate threshold voltages of the respective samples in relation to the gate lengths have the large differences according to the relative directions between the gates and the substrate crystal. This is because the states of diffusion of implanted Si ions for formation of the N<+> type layers 4 toward the under parts of the gate electrodes 3 are differed according to the crystal direction. However, according to this construction, the variations and dispersions of the gate threshold voltages can be made to the uniform and the most suitable values in regard to the two directions of the gate directions making a right angle mutually.

Inventors

• 👤 Hiroyuki Onodera
• 👤 小野寺　裕幸
• 👤 Hidetake Suzuki
• 👤 鈴木　秀威

Bibliographic Details