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JPS5969973A Expired / Lapsed JP ⏱️ 0.0 years remaining

semiconductor equipment

Assignee: NEC Corp
•
Filing: 1982-10-15
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Granted: —
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Expires: 2002-10-15
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Abstract

Abstract PURPOSE:To expand the limited memory holding hours of an MNOS FET at least up to 10<5>hr or more, and to obtain the new MNOS FET sufficient to be called as the non volatile semiconductor memory device by a method wherein impurities as to compensate density of a trapping center to electrons or holes in an Si3N4 layer of charge accumulation layer are added into the Si3N4 layer. CONSTITUTION:An SiO2 layer 2 of 20Angstrom thickness generated according to thermal oxidation is formed on the surface of an N type Si substrate 1, and hydrogen atoms 4 are added as the impurity in the surface of the SiO2 layer 2. The Si3N4 layer 3 (thickness is 500-700Angstrom ) generated according to the CVD method is formed, and moreover an Al gate electrode 5 is formed on the surface of the Si3N4 layer 3. Moreover, source and drain regions, etc., are omitted in the figure. When this method is applied to the MNOS FET using an alumina (Al2O3) layer as a second dielectric layer, the same effect can be obtained. Moreover, as the impurity to be added, F (fluorine), etc., are also favorable.

Inventors

  • 👤 Tatsuo Fuji
  • 👤 藤 龍夫

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 03:37
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/69

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5529133A Cited
JPS5748272A Cited
JPS5893289A Cited

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