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JPS5965446A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Panasonic Holdings Corp
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Filing: 1982-10-06
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Granted: —
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Expires: 2002-10-06
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Abstract

Abstract PURPOSE:To form an element isolating region even under the condition where a groove is narrow and deep by forming a side etching at the time of etching a substrate, leaving poly-Si at the side surface of groove utilizing an overhanging and filling such groove by oxidation. CONSTITUTION:A first SiO2 film 2 is formed on a wafer and an Si3N4 film 3 is deposited. Thereafter, a photo resist pattern 4 for isolation is formed. The first SiO2 film 2 and the Si3N4 film 3 are etched. Thereafter, a groove 5 is formed by etching the wafer 1 in such a way that the side etching of the specified amount is generated. A second SiO2 film 21 is formed on the bottom surface and side surface of the groove 5, and a poly-Si film 22 is deposited. When the poly-Si film 22 is etched, the first SiO2 film 2 and Si3N4 film 3 under the overhanging part are not etched. Thereby the poly-Si film 22 can be left only under the overhanging part. Thereafter, the poly-Si film 22 is oxidized and the isolating region 23 can be formed.

Inventors

  • 👤 Hideaki Shimoda
  • 👤 秀明 下田
  • 👤 Tadanaka Yoneda
  • 👤 米田 忠央
  • 👤 Kazuya Kikuchi
  • 👤 菊池 和也
  • 👤 Haruhide Fuse
  • 👤 玄秀 布施

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 09:55
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0142; H10W10/10; H10W10/17

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