← Back to Patent Explorer
JPS5965431A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor substrate

Assignee: Toshiba Corp
•
Filing: 1982-10-07
•
Granted: —
•
Expires: 2002-10-07
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To make masking adjustment easy and at the same time the absolute value evaluation of the masking adjustment accuracy possible by providing recesses on four positioning edges of a substrate positioning mark corresponding to a cross-shape positioning mark. CONSTITUTION:A positioning mark 2 of a semiconductor substrate is a square and the length a of its side is longer than the width b of a protruded part of a cross-shape positioning mark 1. A recess positioning edge is provided to each side of the square where the protruded part of the cross-shape positioning mark 1 is set. The dimensions (d), (e), (f) of the concave is determined in accordance with the required accuracy for masking adjustment and f-e is the value of the adjustment accuracy. When a is not less than 30mum and b is not less than 10mum, the resolution of the view at the masking adjustment is improved and the adjustment accuracy of 1.0mum can be realized. As the valve f-e of the concave is known beforehand, the absolute value of the adjustment discrepancy can be evaluated at the same time.

Inventors

  • 👤 Kazuo Endo
  • 👤 遠藤 和夫
  • 👤 Takashi Kimura
  • 👤 隆 木村

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 15:12
CPC Classifications
G; G03; G03F; G03F9/00; G03F9/70; G03F9/7073; G03F9/7076

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag