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JPS5957590A Expired / Lapsed JP ⏱️ 0.0 years remaining

Variable delay device for delay time

Assignee: Toshiba Corp
•
Filing: 1982-09-27
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Granted: —
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Expires: 2002-09-27
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Abstract

Abstract PURPOSE:To adjust accurately and quickly the shift of convergence, by writing a corrected or modulated data to a one-frame memory and reading out the memory in synchronizing with a synchronizing signal of a receiver, so as to increase the convergence adjusting points. CONSTITUTION:A position of a picture on a screen and a data of a delay time in this case are inputted to a one-frame memory 82 with a control panel 83 of a delay time variable delay device. Further, a vertical deflecting voltage and a horizontal deflecting voltage of the convergence are compared at comparison circuit 81-1, 81-2, the data corresponding to the convergence error on the screen is read out from the memory 82 to a circuit 87. In this case, a voltage generating a frequency suitable for a video circuit depending on the data from the circuit 87 and the frequency characteristics of a video delay circuit 86 is applied to a clock frequcncy generating circuit 85. The delay time of a video delay circuit 86 is obtained with the variable clock frequency, applied to video receiver 88 and the shift of convergence is adjusted accurately and guickly.

Inventors

  • 👤 Katsue Morohashi
  • 👤 諸橋 勝栄

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 23:38
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/12; H04N9/16; H04N9/28

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5344091A Cited
JPS5486232A Cited
JPS57152288A Cited

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