Semiconductor nonvoratile memory

Abstract

Abstract PURPOSE:To make countermeasure for problems in low voltage circuit especially that of dielectric breakdown unnecessary, by using an MONOS type transistor and lowering voltage required for writing and erasing of memory. CONSTITUTION:The figure shows writing. Potential of n type base plate 37 is fixed to V1. Potential V2 lower than V1 is given to a P well 36. Connection between the well 36 and base plate 37 is made inverted bias. Potential of a gate 31, a source 34 and a drain 35 is made V3-V5 respectively, and V4, V5 are made equal to or higher than V2. When potential sufficiently higher than V4, V5 is given to the gate 31, an inverted layer is generated in the channel of a transistor, and electrons in the inverted layer pass through an oxide film 33 by tunnel phenomenon, and injected to a nitride film 32 as memory charge. V1-V5 are made to satisfy the expression I . Voltage of V11-V5 is applied to a gate insulating film. By selecting V11, V5 to make this voltage sufficiently high and to allow injection of charge from the inverted layer, problems in the low voltage circuit can be eliminated.

Inventors

• 👤 Hisato Hiraishi
• 👤 平石　久人

Bibliographic Details