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JPS5952885A Expired / Lapsed JP ⏱️ 0.0 years remaining

Super conductive schottky transistor and manufacture thereof

Assignee: National Institute of Advanced Industrial Science and Technology
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Filing: 1982-09-20
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Granted: —
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Expires: 2002-09-20
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Abstract

Abstract PURPOSE:To enable to form a broad-band high sensitive amplifying circuit of microscopic signal and a high speed logic circuit of microscopic logic amplitude and low power consumption by a method wherein a superconductive metal layer and two semiconductor layers are joined together, said superconductive metal layer is turned to an emitter or a collector, the first semiconductor layer is turned to a base, and the second semiconductor layer is turned to a collector or an emitter. CONSTITUTION:An n type impurity semiconductor layer 13 is grown on an n<+> type substrate 1 by performing a crystal growing method, and a p type impurity semiconductor layer 14 is formed thereon. Subsequently, after a semiinsulating semiconductor layer 15 has been formed, a transistor is formed by providing a superconductive metal electrode 16 and electrodes 17 and 18. The impurity layers 13, 14 and the semiinsulating layer 15 are formed using the same substance as the base material by controlling the dopant so that the required impurity density or semiinsulating layer can be formed. As a result, a high sensitivity and low noise amplification of microscopic signal or a low level and high speed switching operation can be performed at the operating temperature less than the superconductive transition temperature of the superconductive material of superconductive metal electrode 16 based on the principle of operation different from the conventional bipolar and the field-effect type transistor.

Inventors

  • 👤 Yoshikazu Takano
  • 👤 鷹野 致和
  • 👤 Yoshinobu Sugiyama
  • 👤 杉山 佳延

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 09:08
CPC Classifications
H; H10; H10N; H10N60/00; H10N60/10; H10N60/128

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