Main storage device
Abstract
Abstract PURPOSE:To cope easily with the support of a new memory element and the memory extension, by controlling an address to a memory array card having different type without changing the circuit of the control card. CONSTITUTION:The memory array card 2 is provided respectively with a capacity identification signal generating circuit 3, the circuit 3 generates a capacity identification signal 102 being an information signal relating to the number of memory elements and capacity mounted on the said card 2 and transmits the signal to an address control circuit 4 of the control card 1. The control circuit 4 converts an address signal from an external device based on the capacity identification signal 102 and produces the memory address matched to the card 2 in response to the type of the memory element and transmits it. For example, the memory array card 2 having different type as TYPE 1, 2, 3 are controlled with the same control card 1.
Inventors
- 👤 Tokuji Furuto
- 👤 古戸 徳二
- 👤 Moriyuki Takamura
- 👤 守幸 高村
- 👤 Shigeru Mukougasa
- 👤 向笠 茲
- 👤 Shohei Ikehara
- 👤 池原 昌平
- 👤 Tsune Morioka
- 👤 森岡 常
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.