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JPS594061A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Fujitsu Ltd
•
Filing: 1982-06-30
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Granted: —
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Expires: 2002-06-30
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Abstract

Abstract PURPOSE:To enhance junction strength of sub-substrate junction surface and prevent generation of void by providing a through hole to the solder junction electrode of substrate. CONSTITUTION:An electrical part 8 patterned on a substrate 11 is connected to an electrode 14 of junction area at the rear surface of substrate by a wiring pattern 10 through a through hole 9. A plurality of through holes 13 of about 0.5phi are provided at the center of electrode 14. When soldering a ceramic package 1 and the substrate 11, the gas generated from flux is released C from the holes 13 and thereby generation of void is suppressed, solder 7c rises in the holes 13 and thereby junction intensity is increased. The solder 7c is further strengthened for junction by metallization of inside of through holes 13.

Inventors

  • 👤 Takehisa Tsujimura
  • 👤 辻村 剛久
  • 👤 Toshio Hamano
  • 👤 浜野 寿夫

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 16:50
CPC Classifications
H; H10; H10W; H10W42/00

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5570094A Cited
JPS5783099A Cited
JPS5764953A Cited

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