← Back to Patent Explorer
JPS5932174A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of field effect transistor

Assignee: Toshiba Corp
•
Filing: 1982-08-16
•
Granted: —
•
Expires: 2002-08-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To obtain an FET with a compound semiconductor by preveinting the deterioration in the characteristics due to a reaction between a metal and the semiconductor by the application of a self-aligning method due to an ion implantation and a heat treatment by employing a junction type FET configuration. CONSTITUTION:An i type GaAs active layer 221, an n type GaAlAs layer 222 and a p type GaAlAs layer 23 are laminated by an electron beam epitaxial method on a semi-insulating GaAs substrate 21. This estructure is etched to the vicinity of the layer 221 with a gate region as a mask 24, Si ions are then implanted, the structure is heat treated, and n type source 25 and drain 26 are formed. Then, a CVD SiO2 film 27 is covered, a window is opened, and ohmic Au-Ge electrodes 28-30 are formed. The current of channel 22 can be controlled by applying negative voltage to the electrode 30 in the obtained junction type FET. According to this structure, a compound semiconductor is used, a self- aligning method in an Si gate MOSFET is applied, and an FET which has high density and high performance can be formed.

Inventors

  • 👤 Yasutami Tsukurida
  • 👤 造田 安民

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 00:32
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPS58147169A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag