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JPS59210673A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Fujitsu Ltd
•
Filing: 1983-05-16
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Granted: —
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Expires: 2003-05-16
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Abstract

Abstract PURPOSE:To obtain a P-ROM, which operates at high speed and can be erased electrically, by forming reading currents by carriers, which are isolated spatially from a region, into which an impurity is added, and have high mobility. CONSTITUTION:A non-doped GaAs layer 22, AlGaAs layers 23, into which a doner impurity is introduced selectively, and GaAs layers 24, into which an impurity is not doped or a doner impurity is introduced selectively, are grown on a semi-insulating GaAs substrate 21 in an epitaxial manner in succession. A first two-element electron gas layer 25 is formed in the vicinity of a hetero-junction interface with the layer of the layer 22 and a second two-element electron gas layer 26 in the vicinity of a hetero-junction interface between the layer 24 and the layer 23 by these semiconductor layers. A mask 27 is shaped in a gate electrode forming region, the layers 24, 23 are removed selectively to expose the layer 22, and N<+> type regions 28 are formed in source electrode-drain electrode forming regions. The layers 28 are conducted with the layer 25. Electrodes 29 and 30 are shaped on the regions 28 and a Schottky gate electrode 31 on the layers 24.

Inventors

  • 👤 Shunichi Muto
  • 👤 俊一 武藤
  • 👤 Sukehisa Hiyamizu
  • 👤 冷水 佐寿
  • 👤 Hidetoshi Nishi
  • 👤 西 秀敏

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 23:33
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80

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