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JPS59200439A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Toshiba Corp
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Filing: 1983-04-27
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Granted: —
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Expires: 2003-04-27
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Abstract

Abstract PURPOSE:To realize fine multilayer wiring structure with high reliability by providing a process through which the ions of an impurity are implanted to the whole surface, a process through which a first insulating film is left, a process through which a second insulating film is formed, a process through which a wiring connecting hole is shaped and a process through which a second wiring layer is formed. CONSTITUTION:A silicon nitride film 5 is deposited, and ions are implanted to the whole surface. When the quantity of implantation in the depth direction is controlled in the same depth as the thickness of the silicon nitride film 5 at that time, ions are not implanted to the inside of a broken line 7. When the whole surface is etched under the state, the silicon nitride film 5, the width of an upper section and a lower section thereof equalizes, can be formed on the side wall of a first wiring layer 2 because an etching rate increases in the silicon nitride film 5 to which ions are implanted. A silicon dioxide film 8 is deposited through a plasma CVD method, and a photo-resist film 9 is shaped, and a through-hole 10 is formed while using the photo-resist film as a mask. The selection ratios of the silicon dioxide film 8 and the silicon nitride film 7 can be controlled by changing the conditions of reactive ion etching even when mask alignment is displaced on photoetching. Accordingly, the manufacture of a semiconductor device can correspond to the displacement of mask alignment sufficiently on photoetching.

Inventors

  • 👤 Mitsunao Chiba
  • 👤 千葉 光直

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 20:31
CPC Classifications
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