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JPS5910271A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Hitachi Ltd
•
Filing: 1983-06-20
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Granted: —
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Expires: 2003-06-20
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Abstract

Abstract PURPOSE:To contrive to endure high temperature even in oxidizing atmosphere, resulting in no generation of the crack and exfoliation of an electrode which contains a high melting point metal, and to have low electric resistance by providing the electrode which contains a double layer composed of the high melting point metal and the silicide thereof. CONSTITUTION:An element isolation Si oxide film 2 and a gate oxide film 3 are formed on an Si substrate 1. Next, a polycrystalline Si layer 4 which contains phoshphorus, the high melting point metallic silicide layer 5, and the high melting point metallic layer 6 are formed. Thereafter, a gate electrode 7 is formed. A source 8 and a drain 9 are formed with the gate electrode 7 as the mask. A lead-out electrode 10 from the source 8 and the drain 9 is formed in the same manner as the gate electrode 7. An interlayer insulation film 11 and a passivation film 12 are formed of phosphorus silicide glass. The high melting point metallic silicide layer is formed by the simultaneous or continuous vapor deposition method of the high melting point metal and Si, and the thickness is suitable in approx. 1-30nm.

Inventors

  • 👤 Naoki Yamamoto
  • 👤 直樹 山本
  • 👤 Mitsumasa Koyanagi
  • 👤 光正 小柳
  • 👤 Tetsuya Hayashida
  • 👤 哲哉 林田
  • 👤 Seiji Ikeda
  • 👤 池田 清治

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 02:27
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/62

Claims Analysis

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References Cited (Backward Citations)

JPS4926462A Cited
JPS4940859A Cited
JPS5612754A Cited

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