← Back to Patent Explorer
JPS59100415A Expired / Lapsed JP ⏱️ 0.0 years remaining

Matrix type liquid crystal display device

Assignee: Mitsubishi Electric Corp
•
Filing: 1982-11-30
•
Granted: —
•
Expires: 2002-11-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To obtain the wiring of a thin-film transistor (TR) array which has low resistance and excellent interlayer insulation by using only polycrystalline silicon where impurities are doped for forming intersection parts of gate lines and a source line, and using Al, etc., for other parts of the gate lines. CONSTITUTION:An insulating substrate 8 on which numbers of thin-film transistors (TFT) 12 are formed is filmed with polycrystalline silicon doped with phosphor to 10<15>-10<16> pieces/cm<2> to a 500Angstrom film thickness by vacuum deposition, and patterning is performed to form the 1st gate line 2. Then, a film of SiN is formed by a plasma CVD method and patterned to form an interlayer insulating layer 13 having contact holes 14, and a film of Al alloy is formed by sputtering to a 7,000Angstrom thickness and patterned to form the 2nd gate line 15 short-circuiting the 1st gate line 2, source line 3, a drain electrode 11, and a display electrode 4.

Inventors

  • 👤 Takao Matsumoto
  • 👤 隆夫 松本

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 17:41
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; G02F2202/00; G02F2202/10; G02F2202/104

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPS5888784A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag