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JPS5891676A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Seiko Epson Corp
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Filing: 1981-11-26
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Granted: —
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Expires: 2001-11-26
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Abstract

Abstract PURPOSE:To increase dielectric resistance, and to reduce leakage by using a double film consisting of an oxide film and a nitride film as a gate insulating film when the MOSFET is formed only polysilicon shaped onto an insulating layer. CONSTITUTION:An SiO2 film 22 is formed onto an Si substrate 21, and an N type polysilicon layer 23 and a P type polysilicon layer 24 are shaped onto the film 22. When the MOSFETs are molded to both silicon layers, the double films 25, the polysilicon sides thereof are composed of the oxide films and the gate sides thereof the nitride films, are used as the gate insulating films. Accordingly, since projections extending from the polysilicon layers do not grow in the sections of the nitride films, the growth of the projections is inhibited, and dielectric resistance is increased. 400-600Angstrom Is optimum as the thickness of the lower oxide films, and approximately 200-400Angstrom is proper as the thickness of the upper nitride films. Such double films are also effective to the polysilicon layers directly shaped onto the insulating substrate.

Inventors

  • 👤 Matsuo Ichikawa
  • 👤 市川 松雄

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-07 16:48
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60

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