Logical operation circuit

Abstract

Abstract PURPOSE:To obtain a circuit with good DC balance, by performing the logical operation of maximum value with the emitter connection of an NPN transistor (TR) and that of minimum value with the emitter connection of a PNP TR, respectively. CONSTITUTION:A filter circuit for noise rejection is shown in figure and a television signal is inputted to the circuit. The signal is delayed by delay circuits 3, 4 having a delay of one horizontal period respectively via a band pass filter and the correlation is taken with the signals (no correlation exists if noise is apart from each horizontal period). Circuits 5, 6, 10 output larger input signal and circuits 7, 8, 9 output smaller input signal, respectively. The average output of the circuits 9, 10 is summed to a video signal obtained via a low-pass filter and outputted from an adder 11'. Since TRs constituting the operation circuits are symmetrical between the input and output, good DC balance can be attained.

Inventors

• 👤 Yutaka Tanaka
• 👤 豊 田中

Bibliographic Details