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JPS5886771A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: NEC Corp
•
Filing: 1981-11-18
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Granted: —
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Expires: 2001-11-18
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Abstract

Abstract PURPOSE:To prevent the stepwise disconnection of wirings by surrounding the side surface of an Si gate region with an insulator and a polycrystalline Si layer when forming an IGFET, thereby stabilizing the channel length and eliminating the stepwise difference of the gate region. CONSTITUTION:A thick field SiO2 film 3a is formed on the periphery of a P type Si substrate 1, and a thin gate SiO2 film 3b is formed at the center on the surface of the substrate 1 surrounded by the film 3a. Then, a polycrystalline Si layer 4 which partly becomes a gate region is accumulated on the entire surface which includes them, the entire surface is covered with a laminated film of an SiO2 film 3d and an SiN4 film 6, a hole is opened at the film 6 corresponding to the periphery of the film 3b, thereby exposing part of the film 3d. Thereafter, with the remaining film 6 as a mask, the layer 4 is altered to an SiO2 film 3e through the exposed part of the film 3d, and the gate region 4 which is formed of parts 3c, 3e, 3b of the film 3d is surrounded. Subsequently, an N type impurity is diffused in the layer 4 which is disposed at both sides, is press- diffused, thereby forming N<+> type source and drain regions 2 in the substrate 1 at both sides of the gate region 4.

Inventors

  • 👤 Masaaki Ohira
  • 👤 正明 大平

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 18:53
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60

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