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JPS5886751A Expired / Lapsed JP ⏱️ 0.0 years remaining

Laminated semiconductor device

Assignee: Mitsubishi Electric Corp
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Filing: 1981-11-18
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Granted: —
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Expires: 2001-11-18
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Abstract

Abstract PURPOSE:To highly integrate a laminated semiconductor device by interposing a high melting point metal layer between upper and lower active layers, energizing through them, and dissipating heat via the metal layer. CONSTITUTION:Circuits are included in active layers 2, 3, and are connected via a through hole of a high melting point metal layer 1 with polysilicon 7. The layers 2, 3 are insulated via an oxidized film 4 from the layer 1, and are connected to the layer 1 at the necessary part. The layer 1 is, for example, thermally oxidized to form a metal oxidized film 5 and is insulated from the layers 2, 3. With the structure, the heat produced at the active layers is dissipated externally through the layer 1, the integration of the active layers is enhanced, more layers can be laminated, and the layer 1 can be used as a bus line.

Inventors

  • 👤 Yoichi Akasaka
  • 👤 洋一 赤坂
  • 👤 Kyohiko Kotani
  • 👤 小谷 教彦

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 08:51
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/20; H10W90/288; H10W90/297; H10W90/701; H10W90/721; H10W90/722

Claims Analysis

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References Cited (Backward Citations)

JPS56126956A Cited

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