JPS5880929A
Expired / Lapsed
JP
⏱️ 0.0 years remaining
Complementary mos logical circuit
Assignee: Toshiba Corp
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Filing: 1981-11-06
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Granted: —
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Expires: 2001-11-06
Abstract
Abstract Translated from Japanese (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。 (57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Inventors
- 👤 Kenji Matsuo
- 👤 松尾 研二
- 👤 Yasoji Suzuki
- 👤 八十二 鈴木
Bibliographic Details
Application Number
—
Jurisdiction
JP
Data Source
google_patents
Last Synchronized
2026-10-31 11:18
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448
Claims Analysis
Total Claims: 0
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References Cited (Backward Citations)
JPS522156A
Cited
JPS53125784A
Cited
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