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JPS5878437A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufature of semiconductor device

Assignee: Toshiba Corp
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Filing: 1981-11-04
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Granted: —
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Expires: 2001-11-04
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Abstract

Abstract PURPOSE:To manufacture the semiconductor device having high performance and the high degree of integraion by a method wherein an element isolation region and an inversion preventive layer are formed through self-alignment in the manufacturing process simplified while the generation of an oxidation inducing defect, a white ribbon and a bird beak is prevented and the reduction of an element region is obviated. CONSTITUTION:An oxide film 12 functioning as the element isolation region 17 is previously formed onto a semiconductor substrate 11, a polycrystal silicon pattern 14 is shaped onto said oxide film 12 so as to coat an element region prearranged section 13, impurity ions for preventing inversion are implanted while using said polycrystal silicon pattern 14 as a mask, and the whole surface is coated with a positive type resist 16. One part of said positive type resist 16 is removed from the surface, the polycrystal silicon pattern 14 is exposed, the polycrystal silicon pattern 14 and the oxide film 12 section under said pattern are removed in succession while employing said polycrystal silicon pattern 14 and a residual positive type resist 16' serving as a reverse pattern as masks, and the element isolation region 17 is formed.

Inventors

  • 👤 Kazuhiko Hashimoto
  • 👤 一彦 橋本

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 12:35
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13

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