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JPS5870664A Expired / Lapsed JP ⏱️ 0.0 years remaining

Msk demodulation circuit

Assignee: Mitsubishi Electric Corp
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Filing: 1981-10-22
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Granted: —
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Expires: 2001-10-22
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Abstract

Abstract PURPOSE:To obtain an MSK demodulating circuit with a simple constitution, reproducing a reference carrier wave and a reference clock at the same time, by constituting a clock tracing circuit with a square circuit and a phase locking circuit. CONSTITUTION:An MSK wave is inputted to an input terminal 1 and also synchronizing detectors 2, 3. Demodulated carrier waves shifted with 90 deg. are inputted from a voltage controlled oscillator 6 to the detectors 2, 3, the output of which is inputted to a multiplier 10. The output of multiplication is squared at a square circuit 21 and inputted to a phase locking loop 27 operated in the clock frequency. The loop 27 reproduces clock signals, the reproduced clock signal is frequency-divided into two at a two-frequency-division circuit 27 and inputted to a multiplier 9. The multiplier 9 multiplies the frequency-divided clock signal from the circuit 27 with the signal from the multiplier 10, and the multiplied output is given to the voltage controlled oscillator 6.

Inventors

  • 👤 Seiya Inoue
  • 👤 誠也 井上

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 19:38
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273

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