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JPS5870488A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory circuit

Assignee: NEC Corp
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Filing: 1981-10-21
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Granted: —
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Expires: 2001-10-21
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Abstract

Abstract PURPOSE:To hold a dynamic RAM without providing a refresh cycle, and to increase the processing efficiency, by using a stack area in which a data of a refresh counter is shunted and a means for substituting a data pointer value for its value. CONSTITUTION:In case when usually a basic cycle has no special refresh cycle and an RAM7 is not accessed, a refresh counter 9 refreshes the RAM7 in order. When the RAM is accessed, a value of the counter 9 is shunted in a stack area 10, and a value of a data pointer 11 is substituted for its value. As a result, from the RAM, access can be executed to an address pointed by the data pointer 11 through a read/write buffer 13. When the access is ended, a value of the area 10 is returned into the counter 9, and refresh is restarted from the following address. Also, in case when the access is executed continuously, the refresh cycle is added to the processing cycle by a machine controller 12.

Inventors

  • 👤 Tomoji Nukiyama
  • 👤 抜山 知二

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 19:36
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406

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