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JPS5866356A Expired / Lapsed JP ⏱️ 0.0 years remaining

Controllable semiconductor device

Assignee: Origin Electric Co Ltd
•
Filing: 1981-10-16
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Granted: —
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Expires: 2001-10-16
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Abstract

Abstract PURPOSE:To improve the arc extinguishing characteristic by a method wherein the first region supplying numerous carriers is provided on the first layer filling the role of control layer together with the second region provided to absorb monor carriers from the first layer while control electrodes spanning both regions are further provided. CONSTITUTION:P<-> type base 2 is epitaxially grown on n<+> type substrate 1 to done n<+> emitter 3. Next p type first regions 4' are provided and n type impurity is doped on p<-> layer 2 then n<+> type second regions 8 are provided within the range from p-n junction J made of layers 2 and 3 to diffusion length of monor carriers (electrons). Then control electrodes 7 spanning both regions 4' and 8 are provided. When the device is conductive with base B at possitive potential to emitter E, p<+> regions 4' supply p<-> layer 2 with numerous carriers from said control electrodes 7 side while p<+> regins 4' and p<-> layer 2 substantially form potential barriers against the numerous carriers absorbing electrons without forming said barriers against the minor carriers. Therefore the arc extinguishing characteristic may be improved without accumulating the minor carriers.

Inventors

  • 👤 Yoshihiko Mizushima
  • 👤 宜彦 水島
  • 👤 Yoshihito Amamiya
  • 👤 好仁 雨宮
  • 👤 Yasuo Hasegawa
  • 👤 長谷川 泰男
  • 👤 Toshio Kawamata
  • 👤 川俣 敏夫
  • 👤 Ryoji Saito
  • 👤 斉藤 亮治

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 07:20
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13

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