Polycrystalline thin film transistor

Abstract

Abstract PURPOSE:To obtain an MIS FET having a high carrier mobility by forming a polycrystalline semiconductor layer of columnar structure on non-crystalline or polycrystalline substrate and disposing electrodes to produce an electric field parallel to the axis of the columnar structure, thereby moving the carrier in a direction parallel to the axis of the column with good crystallinity and less defects. CONSTITUTION:5-layers are deposited in vacuum on an amorphous insulating substrate 15 made of like glass. Molybdenum is deposited as a source electrode 8, silicon is then deposited as a high density impurity-added semiconductor layer 9 in vacuum by an electron gun while evaporating N type impurity in a crucible, and only silicon is subsequently grown in polycrystal as no-addition semiconductor active layer 10. Again, an impurity addition is restarted, and a high density impurity-added semiconductor layer 11 is grown in the same method as the layer 9. Further, molybdenum is deposited in vacuum as the drain electrode 12 in the same manner as the source electrode 8. Then, as shown in Fig. b, it is etched by dry etching vertically to the substrate along the polycrystallie column, and an insulating layer such as nitrided silicon is formed by a plasma CVD as shown in Fig. c. A gate electrode 14 is eventually deposited as shown in Fig. d, thereby forming a polycrystalline MIS FET.

Inventors

• 👤 Takao Yonehara
• 👤 隆夫 米原
• 👤 Seishiro Yoshioka
• 👤 吉岡　征四郎
• 👤 Yoshio Sakuma
• 👤 佐久間　純郎

Bibliographic Details