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JPS5861673A Expired / Lapsed JP ⏱️ 0.0 years remaining

Preparation of semiconductor device

Assignee: NEC Corp
•
Filing: 1981-10-09
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Granted: —
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Expires: 2001-10-09
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Abstract

Abstract PURPOSE:To obtain a MOSFET with V-groove with short channel length which assures easy control without deterioration of dielectric strength by providing the V- or U-groove on the (110) surface of N type Si substrate, filling it with the poly-Si and by providing the P layer, N layer to the area other than the groove. CONSTITUTION:The V- or U-groove is formed by the anisotropic etching to the (110) surface of N type Si substrate 1 and it is covered with the SiO2 2. After the poly-Si 3 is sufficiently precipitated, the groove 4 is remained by etching the area except for said groove. The SiO2 in the area other than the region 4 is removed by etching, the P layer 6 and N layer 7 are formed, a window is opened on the SiO2 over the layer 7. Thereby, the gate electrode 9 is formed on the source electrode 8, SiO2 of the U-groove and a new SiO2, while the drain electrode 10 at the rear side of substrate. In the above structure, since the p-n junction end abuts almost vertically to the internal surface 11 of the groove, the field is not easily concentrated, said method can also be applied to the U-groove, while channel length can be controlled easily and thereby the channel can be shortened and high integration can be realized.

Inventors

  • 👤 Masanori Yamamoto
  • 👤 山本 正徳

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 09:18
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/668

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