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JPS5860880A Expired / Lapsed JP ⏱️ 0.0 years remaining

Synchronizing signal separating circuit for television signal

Assignee: Citizen Holdings Co Ltd
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Filing: 1981-10-06
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Granted: —
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Expires: 2001-10-06
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Abstract

Abstract PURPOSE:To increase input impedance by providing a bypass circuit consisting of a bias resistance, a diode, and a capacitor between the gate of an MOS inverter of complementary constitution and a source-drain connection point. CONSTITUTION:An AC-coupled inverter amplifier consists of complementary MOS transistors (TR) 12 and 13, etc. Further, a resistance 18, a diode 19, and a resistance 17 are connected in series between the drain and gate, and at the connection point between the diode 19 and resistance 17, a capacitor 20 forms a bypass. Consequently, a video signal inputted through a capacitor 14 is inverted and amplified by CMOS inverters 12 and 13 to charge the capacitor 20 with the amplified peak voltage of the synchronizing signal side through the diode 19. This charging voltage biases the gate through the resistance 17. Therefore, when the video signal is inputted, the CMOS inverters 12 and 13 bias the synchronizing signal to an active area and the video signal to a cut-off area. Consequently, the synchronizing signal is inverted and outputted to the drain 15.

Inventors

  • 👤 Shizuo Yamaguchi
  • 👤 静男 山口

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 13:03
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; H04N5/08

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