← Back to Patent Explorer
JPS584979A Expired / Lapsed JP ⏱️ 0.0 years remaining

field effect transistor

Assignee: NEC Corp
•
Filing: 1982-04-05
•
Granted: —
•
Expires: 2002-04-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To obtain the FET, structure thereof is simple and which has high output, by forming two independent semiconductor active layers onto a high resistivity layer and shaping a gate electrode contacting with both layers and source and drain electrodes in form that holds a channel and contacts with the active layers. CONSTITUTION:N Type GaAs 2 to which Si is added is grown onto a semi- insulating GaAs substrate 1, to which Cr is added, in epitaxial form, and the two active layers 2 are shaped through photoetching. The two source electrodes 3, 3' and drain electrodes 4, 4' ohmic-contacting are formed through the evaporation of an AuGe alloy, heat treatment in H2 and photoetching. The first and second gate electrodes 6 are molded through the evaporation of Al and photoetching. According to this constitution, the two active layers 2 are obtained through a conventional process, and the FET having output higher than one with one active layer is acquired. A dual gate FET is obtained without diversifying the arrangement of the electrodes in response to various performance, and this constitution is extremely effective for the reduction of cost.

Inventors

  • 👤 Hideaki Kozu
  • 👤 神津 英明

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 15:34
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/87; H10D30/873

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPS6113879A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag