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JPS584419A Expired / Lapsed JP ⏱️ 0.0 years remaining

Bus diagnosing system

Assignee: Fujitsu Ltd
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Filing: 1981-06-30
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Granted: —
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Expires: 2001-06-30
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Abstract

Abstract PURPOSE:To perform a quick reconstitution of a system without causing any confusion to the using processor side, by carrying out the diagnosis and the detection of a fault for the input/output device of the 2nd group which caused the factor of the fault with a spare processor after separating a faulty bus from the using system. CONSTITUTION:A fault of the 1st using bus BO is detected by a bus supervisory circuit SVCO while a system is executing the 1st processor MPRO and the bus BO as the using ones. Then the fault is informed to the using procesor. As a result, the processor MPRO separates the input/output devices IOCi+1-IOCi+n of the 2nd group from the using processor among the input/output devices IOCO-IOCi+n. Then a spare processor MPR1 performs the diagnosis for the separated input/output devices of the 2nd group. Thus the faulty device is detected and the device caused a bus fault is separated from the using system. Then the system is reconstituted.

Inventors

  • 👤 Hisao Kono
  • 👤 河野 久雄
  • 👤 Yoshiaki Sutani
  • 👤 須谷 良昭
  • 👤 Nobuyuki Masuda
  • 👤 増田 伸之

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 19:34
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22

Claims Analysis

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References Cited (Backward Citations)

JPS5028309A Cited

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