Output buffer circuit

Abstract

Abstract PURPOSE:To reduce the power consumption, by providing first and second output transistors (TRs), which output levels (1) and (0) to the outside of a buffer circuit, and first and second load TRs for driving these output TRs and setting the threshold voltage of the first load TR to a value lower than that of the second load TR. CONSTITUTION:When a chip select signal CS is ''0'', TRs T13 and T14 are turned on, and gates of output TRs T9 and T10 become zero, and they are in the high impedance state together. When the signal CS is ''1'' and data is ''1'', a TR T6 is turned off, and a TR T7 is turned on, and therefore, the TR T9 is driven by a load TR T21 having a lower threshold and is turned on. When data is ''0'', the TR T7 is turned off, and therefore, the TR T10 is driven by a load TR T22 and is turned on. Since output TRs T9 and T10 are not made conductive simultaneously, the current consumption is small.

Inventors

• 👤 Hiroshi Iwahashi
• 👤 岩橋　弘
• 👤 Masamichi Asano
• 👤 正通 浅野

Bibliographic Details