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JPS58200575A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Hitachi Ltd
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Filing: 1982-05-19
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Granted: —
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Expires: 2002-05-19
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Abstract

Abstract PURPOSE:To reduce the area of transistors and decrease the base resistance by a method wherein an emitter is formed in a region at a constant distance from the region of insulation film isolation wherein a U-shaped isolation by Si burial is used. CONSTITUTION:A collector buried layer 22 and an Si epitaxial layer 23 are formed on the surface of an Si semiconductor substrate 21, then a groove 26 is formed by etching, and thus an Si oxide film 27 is formed. The isolation is formed by forming a polycrystalline Si 31 after forming a base diffused layer 28, an Si nitride film 29, and an Si oxide film 30. A molybdenum film 32 is adhered, thus metals silicide 33 and 34 are formed by performing heat-treatment, and then a hole 35 for emitter formation is formed. Finally, the emitter diffused layer 37 is formed by ion implantation, after removing the Mo silicide, forming an Si oxide film 36 by thermal oxidation of the polycrystalline Si 31, and etching the Si nitride film 29.

Inventors

  • 👤 Shiyoujirou Sugashiro
  • 👤 菅城 象二郎
  • 👤 Hiroyuki Itou
  • 👤 以頭 博之
  • 👤 Yoichi Tamaoki
  • 👤 玉置 洋一
  • 👤 Masahiko Kogirima
  • 👤 小切間 正彦

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 19:19
CPC Classifications
H; H10; H10D; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D48/345

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