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JPS58129673A Expired / Lapsed JP ⏱️ 0.0 years remaining

Data processor

Assignee: NEC Corp
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Filing: 1982-01-29
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Granted: —
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Expires: 2002-01-29
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Abstract

Abstract PURPOSE:To facilitate utilization of versatile programs other than programs inherent to the system by switching two microprocessors of different kinds. CONSTITUTION:When a switching instruction 1 is read out from a storage section 6 while a microprocessor 1 is in operation and interpreted in a controlling circuit 8, F/F4 changes from on-state to off-state. In response to the change of state of F/F4, the microprocessor 1 itself is stopped by indication from a controlling device 5. Drive of an address bus 3 is stopped and the use right of the bus is delivered to a microprocessor 2. On the other hand, the microprocessor 2 is changed from stop state to a state that permits execution of indication by indication from the controlling device 5 responding to change of state from on to off of the F/F4, and executes microinstructions successively.

Inventors

  • 👤 Tetsuya Hamahira
  • 👤 浜平 哲哉

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 16:04
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30076

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5532118A Cited

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