← Back to Patent Explorer
JPS58119671A Expired / Lapsed JP ⏱️ 0.0 years remaining

Field effect transistor and integrated circuit wherein it is used

Assignee: National Institute of Advanced Industrial Science and Technology
•
Filing: 1982-01-09
•
Granted: —
•
Expires: 2002-01-09
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To avoid the dependence of the gate threshold voltage of the field effect transistor on the impurity concentration of a second semiconductor and to implement a large scale integrated circuit readily by using the semiconductor having the low impurity density as a second semiconductor which is contacted with a first semiconductor constituting a channel forming region. CONSTITUTION:The semiconductor 13, which the first semiconductor constituting the channel forming region, is the compound semiconductor of GaAs and the like. The semiconductor 13 is an n type or p type and has low impurity concentration or it is highly pure semiconductor wherein impurities are hardly added. The semiconductor 13 is located on an insulating substrate 2. A semiconductor 14 has a large band gap than the semiconductor 13. It is the semiconductor which forms an excellent heterojunction with the semiconductor 13, and has the small impurity concentration different from the semiconductor 13. The thickness of the semiconductor 14 can be made sufficiently small in the range a tunnel currnet which exceeds a drain source current does not flow between the semiconductor 13 and a semiconductor 15. One example of the semiconductor 14 is GaxAl1-xAs when the semiconductor is made of GaAs.

Inventors

  • 👤 Noburo Hashizume
  • 👤 橋爪 信郎
  • 👤 Yutaka Hayashi
  • 👤 豊 林
  • 👤 Mutsuro Ogura
  • 👤 睦郎 小倉

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 09:31
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

JPS5161265A Cited
JPS55160473A Cited
JPS5851574A Cited

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag