Semiconductor storage device

Abstract

Abstract PURPOSE:To simultaneously erase a data by a row unit, by constituting so that erase gates of cells of the respective same rows being in the form of a memory matrix are connected in common, and erase voltage is applied to the erase gate of one selected row. CONSTITUTION:A memory cell M11 of 1 bit is constituted of a control gate CG provided through an insulating film on a semiconductor substrate, an erase gate EG provided in the insulating film between said gate and the substrate, a floating gate FG which is provided in parallel with the gate EG in the insulating film, and whose end part is overlapped with a part of the gate EG through the insulating film, a source S and a drain D. A memory matrix is constituted by placing this cell in N lines and M rows, the erase gates EG of cells in the same row are connected in common, and to the erase gate EG of the cells in one selected row, data erase voltage is applied through a voltage boosting circuit 51.

Inventors

• 👤 Fujio Masuoka

Bibliographic Details